/*
 * FB driver for the ST7789P3 LCD Controller
 *
 * Copyright (C) 2015 Dennis Menschel
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include "fbtft.h"
#include "asm-generic/gpio.h"

#define DRVNAME "fb_st7789p3"

#define DEFAULT_GAMMA \
	"F0 12 18 10 0E 39 34 65 42 38 0D 0D 17 20\n" \
	"F0 10 16 0A 09 05 34 54 41 3A 10 0E 15 1D"

#define __RESET__	1
//#define __SPICS__	1
#define __ROT90__	1
#define __BKLEN__	1
static int request_gpios(struct fbtft_par *par);

/**
 * init_display() - initialize the display controller
 *
 * @par: FBTFT parameter object
 *
 * Most of the commands in this init function set their parameters to the
 * same default values which are already in place after the display has been
 * powered up. (The main exception to this rule is the pixel format which
 * would default to 18 instead of 16 bit per pixel.)
 * Nonetheless, this sequence can be used as a template for concrete
 * displays which usually need some adjustments.
 *
 * Return: 0 on success, < 0 if error occurred.
 */
static int init_display(struct fbtft_par *par)
{
	//par->fbtftops.reset(par);
	gpio_set_value(par->gpio.reset, 0);
	__MDELAY(20);
	gpio_set_value(par->gpio.reset, 1);
	__MDELAY(120);


	write_reg(par, 0x11);
	__MDELAY(120);
	write_reg(par, 0x36, 0x00);
	write_reg(par, 0x3A, 0x05);

	write_reg(par, 0xB0, 0x00, 0xE0);
	write_reg(par, 0xB2, 0x0C, 0x0C, 0x00, 0x33, 0x33);

	write_reg(par, 0xB7, 0x00);
	write_reg(par, 0xBB, 0x33);

	write_reg(par, 0xC0, 0x2C);
	write_reg(par, 0xC2, 0x01, 0xFF);
	write_reg(par, 0xC3, 0x23);

	write_reg(par, 0xC6, 0x0F);
	write_reg(par, 0xD0, 0xA7);
	write_reg(par, 0xD0, 0xA4, 0xA1);

	write_reg(par, 0xD6, 0xA1);

	write_reg(par, 0xE0, 0xF0, 0x12, 0x18, 0x10, 0x0E, 0x39, 0x34, 0x65, 0x42, 0x38, 0x0D, 0x0D, 0x17, 0x20);
	write_reg(par, 0xE1, 0xF0, 0x10, 0x16, 0x0A, 0x09, 0x05, 0x34, 0x54, 0x41, 0x3A, 0x10, 0x0E, 0x15, 0x1D);

  	write_reg(par, 0x21);		//? INVON (21h): Display Inversion On, INVOFF (20h): Display Inversion Off
	write_reg(par, 0x28);		// DISPON (28h): Display Off

	{
			/* set windows */
		unsigned short xEnd = 239;
		unsigned short yEnd = 319;
		write_reg(par, 0x36, 0x00);
		write_reg(par, 0x2A, 0x0, 0x0, 0, 239);
		write_reg(par, 0x2B, 0x0, 0x0, ((yEnd >> 8) & 0xff), (yEnd & 0xff));
		//write_reg(par, 0x2C);
	}

	return 0;
}

void do_logo_disp_color(struct fbtft_par *par, unsigned short color) {
	int __w = 240, __h = 320;
	int i, m;

	write_reg(par, 0x2C);
	for(i=0; i<__w; i++) {
		for(m=0; m<__h; m++) {
			//__MDELAY(120);
			//write_dat(par, (color>>8) & 0xff);
			write_dat(par, ((color>>8) & 0xff));
			//__MDELAY(120);
			//write_dat(par, (color>>0) & 0xff);
			write_dat(par, ((color>>0) & 0xff));
		}
	}
}


#define WRITE_BATCH_SIZE 32 
extern unsigned char res_rgb565_240x320_map[];
void do_logo_disp_datas(void *_par ) {
    struct fbtft_par *par = (struct fbtft_par *)_par;
    int total_pixels = 240 * 320;
    int total_bytes = total_pixels * 2;
    int i = 0;

    write_reg(par, 0x2C);
    for (i = 0; i < total_bytes; i += WRITE_BATCH_SIZE) {
        int current_batch_size = (total_bytes - i < WRITE_BATCH_SIZE)? total_bytes - i : WRITE_BATCH_SIZE;
        write_datas(par, &res_rgb565_240x320_map[i], current_batch_size);
    }
	__MDELAY(10);
		write_reg(par, 0x29);		// DISPON (29h): Display On
	enable_backlight();
}

void enable_backlight(void);

void do_logo_disp_data(void *_par, unsigned short *color) {
	extern unsigned char res_rgb565_240x320_map[];
	struct fbtft_par *par = (struct fbtft_par *)_par;
	int i=0; unsigned short _color = 0;
	unsigned short *_p16buf = (unsigned short *)&res_rgb565_240x320_map;
	(void)color;

	write_reg(par, 0x2C);
	for(i=0; i<(240*320); i++) {
		_color = _p16buf[i];
		write_dat(par, ((_color>>8) & 0xff));
		write_dat(par, ((_color>>0) & 0xff));
	}
	enable_backlight();
}

static struct fbtft_display display = {
	.buswidth = 8,
	.bpp = 0,
	.fps = 30,
	.txbuflen = 0,
	.debug = 0, 	//0x7 | (1<<21),
	.regwidth = 8,
	.width = 240,
	.height = 320,
	.gamma_num = 2,
	.gamma_len = 14,
	.gamma = DEFAULT_GAMMA,
	.fbtftops = {
		.init_display = init_display,
		.request_gpios = request_gpios,
	},
};

int fbtft_display_init(void)
{
	printf("st7789p3 init\n");
	extern int fbtft_probe_common(struct fbtft_display *display);
	int ret = fbtft_probe_common(&display);
	return ret;
}

#define REG_TOP_PIN_BASE    0x10200000
#define REG_SPI_CSN_PIN     (0x098)
#define REG_SPI_CLK_PIN     (0x094)
#define REG_SPI_DIX_PIN     (0x09C)
#define REG_GPIO4_0_PIN     (0x0A0)
#define REG_GPIO3_7_PIN     (0x08C)
#define REG_GPIO5_4_PIN     (0x0AC)

#define REG_LCD_RSX_PIN		REG_GPIO4_0_PIN
#define REG_LCD_RST_PIN		REG_GPIO3_7_PIN
#define REG_LCD_BKL_PIN		REG_GPIO5_4_PIN

#define MC_GPIO4_0	(4*8+0)	//used for LCD_RS
#define MC_GPIO3_7	(3*8+7)	//used for LCD_RST
#define MC_GPIO5_4	(5*8+4)	//used for LCD_BKL

#define REG_DPHYRX_PCS_BASE    0x2c200000

static void __pin_patch_csi1_for_spilcd(void)
{
	volatile unsigned int reg = REG_DPHYRX_PCS_BASE;
	writel(0x100, reg + 0x148);		//0x2c200148 ->100 	-RG_CSI_CORE1_EN
	writel(0xA00000, reg + 0x134);		//0x2c200134 ->0xA00000		-RG_CSI_LDO1_EN, RG_CSI_LDO1_BYPASS
	return;
}

static void __pin_init(void)
{
	volatile unsigned int reg = REG_TOP_PIN_BASE;
#ifdef __SPICS__
    writel(3, reg + REG_SPI_CSN_PIN);
#endif
	__pin_patch_csi1_for_spilcd();
///writel(1, reg + REG_SPI_CSN_PIN);
    writel(3, reg + REG_SPI_CLK_PIN);
    writel(3, reg + REG_SPI_DIX_PIN);
    writel(1, reg + REG_LCD_RSX_PIN);

#ifdef __RESET__
	writel(1, reg + REG_LCD_RST_PIN);
#endif

#ifdef __BKLEN__
	writel(1, reg + REG_LCD_BKL_PIN);
#endif

	reg = (volatile unsigned int )0x09200200;
	/* 100MHz */
	unsigned int val = readl(reg + 0x50);
	if(val != 2) {
		printf("%s 0x09200250:0x%x\n", __func__, val);
		writel(2, reg + 0x50);
	}
	val = readl(reg + 0x6c);
	if(val != 0x102) {
		printf("%s 0x0920026c:0x%x\n", __func__, val);
		//writel(0x102, reg + 0x6c);
	}
}

static int request_gpios(struct fbtft_par *par)
{

	par->gpio.dc = MC_GPIO4_0;
#ifdef __RESET__
	par->gpio.reset = MC_GPIO3_7;
#endif

#ifdef __BKLEN__
	int _gpio_bkl = MC_GPIO5_4;
#endif

	__pin_init();

	if(gpio_request(par->gpio.dc, "dc-gpio"))
		printf("spi tft failed to request the gpio:%d\n", par->gpio.dc);
	gpio_direction_output(par->gpio.dc, 0);

#ifdef __BKLEN__
	/* set backlight gpio */
	if(gpio_request(_gpio_bkl, "bkl-gpio"))
		printf("spi tft failed to request the bkl gpio:%d\n", _gpio_bkl);
	gpio_direction_output(_gpio_bkl, 0);
	//gpio_set_value(_gpio_bkl, 1);
#endif

#ifdef __RESET__
	if(gpio_request(par->gpio.reset, "reset-gpio"))
		printf("spi tft failed to request the gpio:%d\n", par->gpio.reset);
	gpio_direction_output(par->gpio.reset, 0);
#endif
	return 0;
}

void enable_backlight(void)
{
	#ifdef __BKLEN__
	gpio_set_value(MC_GPIO5_4, 1);
	#endif
}

#if 0
static struct fbtft_platform_data platfrom_data = {
	.rotate = 0,
	.bgr = 0,
	.fps = 30,
	.txbuflen = 0,
	.startbyte = 0,
};

struct fbtft_platform_data * fbtft_driver_get_platform_data(const char* name) {
	memcpy(&platfrom_data.display, &display, sizeof(struct fbtft_display));
	return &platfrom_data;
}
EXPORT_SYMBOL(fbtft_driver_get_platform_data);

static int __init fbtft_test_gpio(void)
{
	__pin_init();
	gpio_request(MC_GPIO2_6, "dc-gpio");
	gpio_direction_output(MC_GPIO2_6, 0);
	gpio_set_value(MC_GPIO2_6, 0);
	__MDELAY(120);
	gpio_set_value(MC_GPIO2_6, 1);
	__MDELAY(120);
	gpio_set_value(MC_GPIO2_6, 1);
}

module_init(fbtft_test_gpio);
#endif
